mirror of
https://github.com/gnuton/asuswrt-merlin.ng.git
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98 lines
3 KiB
C
98 lines
3 KiB
C
/*
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* <:copyright-BRCM:2018:DUAL/GPL:standard
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*
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* Copyright (c) 2018 Broadcom
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* All Rights Reserved
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed
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* to you under the terms of the GNU General Public License version 2
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* (the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
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* with the following added to such license:
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*
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* As a special exception, the copyright holders of this software give
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* you permission to link this software with independent modules, and
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* to copy and distribute the resulting executable under terms of your
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* choice, provided that you also meet, for each linked independent
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* module, the terms and conditions of the license of that module.
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* An independent module is a module which is not derived from this
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* software. The special exception does not apply to any modifications
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* of the software.
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*
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* Not withstanding the above, under no circumstances may you combine
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* this software in any way with any other Broadcom software provided
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* under a license other than the GPL, without Broadcom's express prior
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* written consent.
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*
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* :>
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*/
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/* BCM UBUS3 supporting routines */
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#include "bcm_map_part.h"
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#ifdef _CFE_
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#include "lib_types.h"
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#include "lib_printf.h"
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#define printk printf
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#define udelay cfe_usleep
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#else // Linux
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include "bcm_physical_map_part.h"
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#include "board.h"
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#include <linux/bug.h>
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#include "enum_str.h"
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#endif
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#ifndef _CFE_
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int ubus_decode_pcie_wnd_cfg(unsigned int base, unsigned int size, unsigned int core)
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{
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#if defined(CONFIG_BCM94908)
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uint32 core2pid[3] = {0x00, 0x07, 0x0d};
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uint32 reg_data0, reg_data1;
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int c = -1;
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static int cfg_index = 0;
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if (cfg_index >= 8) {
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/* Max only 8 registers */
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printk("%s(0x%x, 0x%x, 0x%x) exceeded max registers\r\n",
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__FUNCTION__, base, size, core);
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return -1;
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}
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if (!size) {
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/* size can not be zero */
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printk("%s(0x%x, 0x%x, 0x%x) invalid size\r\n",
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__FUNCTION__, base, size, core);
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return -1;
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}
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/* Get the size bits (assumed size is always in power of 2) */
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while (size) {
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c++;
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size >>= 1;
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}
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/* Is this extension of existing memory region or using a new region ? */
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reg_data0 = (base >> 8); //base addr[31:8] @ 23:00
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reg_data0 |= (((base >> 8) & 0xFF) << 24); //remap addr[15:8] @ 31:24
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reg_data1 = (base >> 16); //remap addr[31:16] @ 47:32
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reg_data1 |= (core2pid[core] << 16); //pid[7:0] @ 55:48
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reg_data1 |= (c << 24); //size[4:0] @ 60:56
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reg_data1 |= (0x01 << 30); //enable[1:0] @63:62
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printk("[%d] ubus_cfg_window[0] = 0x%x, ubus_cfg_window[1] = 0x%x\r\n",
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core, reg_data0, reg_data1);
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BIUCTRL->ubus_cfg_window[cfg_index++] = reg_data0;
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BIUCTRL->ubus_cfg_window[cfg_index++] = reg_data1;
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return 0;
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#else /* ! CONFIG_BCM94908 */
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return -1;
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#endif /* ! CONFIG_BCM94908 */
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}
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EXPORT_SYMBOL(ubus_decode_pcie_wnd_cfg);
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#endif
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