mirror of
https://github.com/gnuton/asuswrt-merlin.ng.git
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292 lines
14 KiB
C
292 lines
14 KiB
C
/*
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<:copyright-BRCM:2013:DUAL/GPL:standard
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Copyright (c) 2013 Broadcom
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All Rights Reserved
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Unless you and Broadcom execute a separate written software license
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agreement governing use of this software, this software is licensed
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to you under the terms of the GNU General Public License version 2
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(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
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with the following added to such license:
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As a special exception, the copyright holders of this software give
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you permission to link this software with independent modules, and
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to copy and distribute the resulting executable under terms of your
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choice, provided that you also meet, for each linked independent
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module, the terms and conditions of the license of that module.
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An independent module is a module which is not derived from this
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software. The special exception does not apply to any modifications
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of the software.
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Not withstanding the above, under no circumstances may you combine
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this software in any way with any other Broadcom software provided
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under a license other than the GPL, without Broadcom's express prior
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written consent.
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:>
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*/
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#ifndef __63148_INTR_H
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#define __63148_INTR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if 0
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// FIXME! not use?
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#define INTERRUPT_ID_SOFTWARE_0 0
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#define INTERRUPT_ID_SOFTWARE_1 1
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#endif
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/*=====================================================================*/
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/* BCM63148 Timer Interrupt Level Assignments */
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/*=====================================================================*/
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#if 0
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// FIXME.. not use?
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#define MIPS_TIMER_INT 7 // FIXME?
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#endif
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/*=====================================================================*/
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/* Peripheral ISR Table Offset */
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/*=====================================================================*/
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#define ISR_TABLE_OFFSET 32 // FIXME?
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#define ISR_TABLE2_OFFSET ISR_TABLE_OFFSET + 32
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#define ISR_TABLE3_OFFSET ISR_TABLE2_OFFSET + 32
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#define ISR_TABLE4_OFFSET ISR_TABLE3_OFFSET + 32
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/*=====================================================================*/
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/* Logical Peripheral Interrupt IDs */
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/*=====================================================================*/
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#define INTERRUPT_ID_L2CC (ISR_TABLE_OFFSET + 0)
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#define INTERRUPT_ID_PWRWDOG (ISR_TABLE_OFFSET + 1)
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#define INTERRUPT_ID_TRAPAXI0 (ISR_TABLE_OFFSET + 2)
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#define INTERRUPT_ID_TRAPAXI1 (ISR_TABLE_OFFSET + 3)
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#define INTERRUPT_ID_COMMTX (ISR_TABLE_OFFSET + 4)
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#define INTERRUPT_ID_COMMRX (ISR_TABLE_OFFSET + 5)
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#define INTERRUPT_ID_PMU (ISR_TABLE_OFFSET + 6)
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#define INTERRUPT_ID_CTI (ISR_TABLE_OFFSET + 7)
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#define INTERRUPT_ID_DEFFLG0 (ISR_TABLE_OFFSET + 8)
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#define INTERRUPT_ID_DEFFLG1 (ISR_TABLE_OFFSET + 9)
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#define INTERRUPT_ID_PARITYFAIL_CPU0 (ISR_TABLE_OFFSET + 10)
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#define INTERRUPT_ID_PARITYFAIL_CPU1 (ISR_TABLE_OFFSET + 11)
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#define INTERRUPT_ID_PARITYFAIL_SCU0 (ISR_TABLE_OFFSET + 12)
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#define INTERRUPT_ID_PARITYFAIL_SCU1 (ISR_TABLE_OFFSET + 13)
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#define INTERRUPT_ID_ARM_TIMER (ISR_TABLE_OFFSET + 15)
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#define INTERRUPT_ID_WDTIMER (ISR_TABLE_OFFSET + 16)
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#define INTERRUPT_ID_AES (ISR_TABLE_OFFSET + 17)
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#define INTERRUPT_ID_DDRSEC (ISR_TABLE_OFFSET + 18)
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#define INTERRUPT_ID_AIPSEC (ISR_TABLE_OFFSET + 19)
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#define INTERRUPT_ID_PERIPHSEC (ISR_TABLE_OFFSET + 20)
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#define INTERRUPT_ID_PMCSEC (ISR_TABLE_OFFSET + 21)
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#define INTERRUPT_ID_UBUSERR (ISR_TABLE_OFFSET + 22)
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#define INTERRUPT_ID_MBOX2 (ISR_TABLE_OFFSET + 23)
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#define INTERRUPT_ID_MBOX3 (ISR_TABLE_OFFSET + 24)
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#define INTERRUPT_ID_DG (ISR_TABLE_OFFSET + 29)
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#define INTERRUPT_ID_PMC0 (ISR_TABLE_OFFSET + 30)
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#define INTERRUPT_ID_PMC1 (ISR_TABLE_OFFSET + 31)
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#define INTERRUPT_ID_UART0 (ISR_TABLE2_OFFSET + 0)
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#define INTERRUPT_ID_UART INTERRUPT_ID_UART0
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#define INTERRUPT_ID_UART1 (ISR_TABLE2_OFFSET + 1)
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#define INTERRUPT_ID_UART2 (ISR_TABLE2_OFFSET + 2)
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#define INTERRUPT_ID_AIPETB (ISR_TABLE2_OFFSET + 3)
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#define INTERRUPT_ID_UBUS2ER (ISR_TABLE2_OFFSET + 4)
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#define INTERRUPT_ID_HS_SPIM (ISR_TABLE2_OFFSET + 5)
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#define INTERRUPT_ID_NAND_FLASH (ISR_TABLE2_OFFSET + 6)
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#define INTERRUPT_ID_DDRC (ISR_TABLE2_OFFSET + 7)
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#define INTERRUPT_ID_VDSL (ISR_TABLE2_OFFSET + 8)
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#define INTERRUPT_ID_SARC (ISR_TABLE2_OFFSET + 9)
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#define INTERRUPT_ID_USBDC (ISR_TABLE2_OFFSET + 10)
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#define INTERRUPT_ID_PCMC (ISR_TABLE2_OFFSET + 11)
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#define INTERRUPT_ID_SATAERR (ISR_TABLE2_OFFSET + 12)
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#define INTERRUPT_ID_SATAC (ISR_TABLE2_OFFSET + 13)
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#define INTERRUPT_ID_RUNNER_0 (ISR_TABLE2_OFFSET + 14)
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#define INTERRUPT_ID_RUNNER_1 (ISR_TABLE2_OFFSET + 15)
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#define INTERRUPT_ID_RUNNER_2 (ISR_TABLE2_OFFSET + 16)
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#define INTERRUPT_ID_RUNNER_3 (ISR_TABLE2_OFFSET + 17)
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#define INTERRUPT_ID_RUNNER_4 (ISR_TABLE2_OFFSET + 18)
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#define INTERRUPT_ID_RUNNER_5 (ISR_TABLE2_OFFSET + 19)
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#define INTERRUPT_ID_RUNNER_6 (ISR_TABLE2_OFFSET + 20)
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#define INTERRUPT_ID_RUNNER_7 (ISR_TABLE2_OFFSET + 21)
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#define INTERRUPT_ID_RUNNER_8 (ISR_TABLE2_OFFSET + 22)
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#define INTERRUPT_ID_RUNNER_9 (ISR_TABLE2_OFFSET + 23)
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#define INTERRUPT_ID_RDP_SBPM (ISR_TABLE2_OFFSET + 24)
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#define INTERRUPT_ID_RDP_BPM (ISR_TABLE2_OFFSET + 25)
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#define INTERRUPT_ID_SF2_0 (ISR_TABLE2_OFFSET + 26)
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#define INTERRUPT_ID_SF2_1 (ISR_TABLE2_OFFSET + 27)
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#define INTERRUPT_ID_PCIE0 (ISR_TABLE2_OFFSET + 28)
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#define INTERRUPT_ID_PCIE1 (ISR_TABLE2_OFFSET + 29)
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#define INTERRUPT_ID_DECT_0 (ISR_TABLE2_OFFSET + 30)
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#define INTERRUPT_ID_DECT_1 (ISR_TABLE2_OFFSET + 31)
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#if 0
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/* old naming, module owner feel free to replace if the namings up there
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* are not correct. */
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#define INTERRUPT_ID_IPSEC (ISR_TABLE_OFFSET + 8)
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#define INTERRUPT_ID_USBH (ISR_TABLE_OFFSET + 9)
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#define INTERRUPT_ID_USBH20 (ISR_TABLE_OFFSET + 10)
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#define INTERRUPT_ID_USBS (ISR_TABLE_OFFSET + 11)
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#define INTERRUPT_ID_PCM (ISR_TABLE_OFFSET + 12)
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#define INTERRUPT_ID_PCIE_RC (INTERNAL_HIGH_ISR_TABLE_OFFSET + 8)
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#define INTERRUPT_ID_PCIE_EP (INTERNAL_HIGH_ISR_TABLE_OFFSET + 9)
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#define INTERRUPT_ID_SAR (INTERNAL_HIGH_ISR_TABLE_OFFSET + 17)
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#endif
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#define INTERRUPT_ID_TIMER0 (ISR_TABLE3_OFFSET + 0)
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#define INTERRUPT_ID_TIMER INTERRUPT_ID_TIMER0
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#define INTERRUPT_ID_TIMER1 (ISR_TABLE3_OFFSET + 1)
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#define INTERRUPT_ID_TIMER2 (ISR_TABLE3_OFFSET + 2)
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#define INTERRUPT_ID_TIMER3 (ISR_TABLE3_OFFSET + 3)
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#define INTERRUPT_ID_TIMER_MAX INTERRUPT_ID_TIMER3
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#define INTERRUPT_ID_PER_MBOX0 (ISR_TABLE3_OFFSET + 4)
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#define INTERRUPT_ID_PER_MBOX1 (ISR_TABLE3_OFFSET + 5)
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#define INTERRUPT_ID_PER_MBOX2 (ISR_TABLE3_OFFSET + 6)
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#define INTERRUPT_ID_PER_MBOX3 (ISR_TABLE3_OFFSET + 7)
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#define INTERRUPT_ID_USB_OHCI (ISR_TABLE3_OFFSET + 8)
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#define INTERRUPT_ID_USB_EHCI (ISR_TABLE3_OFFSET + 9)
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#define INTERRUPT_ID_USB_XHCI (ISR_TABLE3_OFFSET + 10)
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#define INTERRUPT_ID_USB_HBR (ISR_TABLE3_OFFSET + 11)
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#define INTERRUPT_ID_USB_HEV (ISR_TABLE3_OFFSET + 12)
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#define INTERRUPT_ID_EXTERNAL_0 (ISR_TABLE3_OFFSET + 13)
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#define INTERRUPT_ID_EXTERNAL_1 (ISR_TABLE3_OFFSET + 14)
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#define INTERRUPT_ID_EXTERNAL_2 (ISR_TABLE3_OFFSET + 15)
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#define INTERRUPT_ID_EXTERNAL_3 (ISR_TABLE3_OFFSET + 16)
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#define INTERRUPT_ID_EXTERNAL_4 (ISR_TABLE3_OFFSET + 17)
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#define INTERRUPT_ID_EXTERNAL_5 (ISR_TABLE3_OFFSET + 18)
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#define INTERRUPT_ID_I2C (ISR_TABLE3_OFFSET + 19)
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#define INTERRUPT_ID_I2S (ISR_TABLE3_OFFSET + 20)
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#define INTERRUPT_ID_RNG (ISR_TABLE3_OFFSET + 21)
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#define INTERRUPT_ID_EXTERNAL_MAX INTERRUPT_ID_RNG
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#define MAP_EXT_IRQ_TO_GPIO(n) ((n)+32)
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#if 0
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/* old naming, module owner feel free to replace if the namings up there
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* are not correct. */
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#define INTERRUPT_ID_USB_CNTL_RX_DMA (ISR_TABLE_OFFSET + 19)
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#define INTERRUPT_ID_USB_BULK_RX_DMA (ISR_TABLE_OFFSET + 20)
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#define INTERRUPT_ID_USB_ISO_RX_DMA (ISR_TABLE_OFFSET + 21)
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#define INTERRUPT_ID_USB_CNTL_TX_DMA (INTERNAL_HIGH_ISR_TABLE_OFFSET + 4)
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#define INTERRUPT_ID_USB_BULK_TX_DMA (INTERNAL_HIGH_ISR_TABLE_OFFSET + 5)
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#define INTERRUPT_ID_USB_ISO_TX_DMA (INTERNAL_HIGH_ISR_TABLE_OFFSET + 6)
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#define INTERRUPT_ID_USB_CONNECT (INTERNAL_HIGH_ISR_TABLE_OFFSET + 21)
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#define INTERRUPT_ID_USB_DISCONNECT (INTERNAL_HIGH_ISR_TABLE_OFFSET + 22)
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#endif
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#define INTERRUPT_ID_SAR_0 (ISR_TABLE4_OFFSET + 0)
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#define INTERRUPT_ID_SAR_1 (ISR_TABLE4_OFFSET + 1)
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#define INTERRUPT_ID_SAR_2 (ISR_TABLE4_OFFSET + 2)
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#define INTERRUPT_ID_SAR_3 (ISR_TABLE4_OFFSET + 3)
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#define INTERRUPT_ID_SAR_4 (ISR_TABLE4_OFFSET + 4)
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#define INTERRUPT_ID_SAR_5 (ISR_TABLE4_OFFSET + 5)
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#define INTERRUPT_ID_SAR_6 (ISR_TABLE4_OFFSET + 6)
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#define INTERRUPT_ID_SAR_7 (ISR_TABLE4_OFFSET + 7)
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#define INTERRUPT_ID_SAR_8 (ISR_TABLE4_OFFSET + 8)
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#define INTERRUPT_ID_SAR_9 (ISR_TABLE4_OFFSET + 9)
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#define INTERRUPT_ID_SAR_10 (ISR_TABLE4_OFFSET + 10)
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#define INTERRUPT_ID_SAR_11 (ISR_TABLE4_OFFSET + 11)
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#define INTERRUPT_ID_SAR_12 (ISR_TABLE4_OFFSET + 12)
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#define INTERRUPT_ID_SAR_13 (ISR_TABLE4_OFFSET + 13)
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#define INTERRUPT_ID_SAR_14 (ISR_TABLE4_OFFSET + 14)
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#define INTERRUPT_ID_SAR_15 (ISR_TABLE4_OFFSET + 15)
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#define INTERRUPT_ID_SAR_16 (ISR_TABLE4_OFFSET + 16)
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#define INTERRUPT_ID_SAR_17 (ISR_TABLE4_OFFSET + 17)
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#define INTERRUPT_ID_SAR_18 (ISR_TABLE4_OFFSET + 18)
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#define INTERRUPT_ID_SAR_19 (ISR_TABLE4_OFFSET + 19)
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#define INTERRUPT_ID_PCM_0 (ISR_TABLE4_OFFSET + 20)
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#define INTERRUPT_ID_PCM_1 (ISR_TABLE4_OFFSET + 21)
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#define INTERRUPT_ID_USBD_0 (ISR_TABLE4_OFFSET + 22)
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#define INTERRUPT_ID_USBD_1 (ISR_TABLE4_OFFSET + 23)
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#define INTERRUPT_ID_USBD_2 (ISR_TABLE4_OFFSET + 24)
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#define INTERRUPT_ID_USBD_3 (ISR_TABLE4_OFFSET + 25)
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#define INTERRUPT_ID_USBD_4 (ISR_TABLE4_OFFSET + 26)
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#define INTERRUPT_ID_USBD_5 (ISR_TABLE4_OFFSET + 27)
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#if 0
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/* old naming, module owner feel free to replace if the namings up there
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* are not correct. */
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#define INTERRUPT_ID_PCM_DMA_0 (INTERNAL_HIGH_ISR_TABLE_OFFSET + 10)
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#define INTERRUPT_ID_PCM_DMA_1 (INTERNAL_HIGH_ISR_TABLE_OFFSET + 11)
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#endif
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#if 0
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/* old interrupt ID, remove later */
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#define INTERRUPT_ID_ENETSW_RX_DMA_0 (ISR_TABLE_OFFSET + 1)
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#define INTERRUPT_ID_ENETSW_RX_DMA_1 (ISR_TABLE_OFFSET + 2)
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#define INTERRUPT_ID_ENETSW_RX_DMA_2 (ISR_TABLE_OFFSET + 3)
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#define INTERRUPT_ID_ENETSW_RX_DMA_3 (ISR_TABLE_OFFSET + 4)
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#define INTERRUPT_ID_EPHY (ISR_TABLE_OFFSET + 13)
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#define INTERRUPT_ID_DG (ISR_TABLE_OFFSET + 14)
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#define INTERRUPT_ID_EPHY_ENERGY_0 (ISR_TABLE_OFFSET + 15)
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#define INTERRUPT_ID_EPHY_ENERGY_1 (ISR_TABLE_OFFSET + 16)
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#define INTERRUPT_ID_EPHY_ENERGY_2 (ISR_TABLE_OFFSET + 17)
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#define INTERRUPT_ID_GPHY_ENERGY_0 (ISR_TABLE_OFFSET + 18)
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#define INTERRUPT_ID_IPSEC_DMA_0 (ISR_TABLE_OFFSET + 22)
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#define INTERRUPT_ID_XDSL (ISR_TABLE_OFFSET + 23)
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#define INTERRUPT_ID_FAP_0 (ISR_TABLE_OFFSET + 24)
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#define INTERRUPT_ID_FAP_1 (ISR_TABLE_OFFSET + 25)
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#define INTERRUPT_ID_ATM_DMA_0 (ISR_TABLE_OFFSET + 26)
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#define INTERRUPT_ID_ATM_DMA_1 (ISR_TABLE_OFFSET + 27)
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#define INTERRUPT_ID_ATM_DMA_2 (ISR_TABLE_OFFSET + 28)
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#define INTERRUPT_ID_ATM_DMA_3 (ISR_TABLE_OFFSET + 29)
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#define INTERRUPT_ID_WAKE_ON_IRQ (ISR_TABLE_OFFSET + 30)
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#define INTERRUPT_ID_GPHY (ISR_TABLE_OFFSET + 31)
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#define INTERRUPT_ID_IPSEC_DMA_1 (INTERNAL_HIGH_ISR_TABLE_OFFSET + 7)
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#define INTERRUPT_ID_ENETSW_SYS (INTERNAL_HIGH_ISR_TABLE_OFFSET + 16)
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#define INTERRUPT_ID_RING_OSC (INTERNAL_HIGH_ISR_TABLE_OFFSET + 20)
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#define INTERRUPT_ID_ATM_DMA_4 (INTERNAL_HIGH_ISR_TABLE_OFFSET + 27)
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#define INTERRUPT_ID_ATM_DMA_5 (INTERNAL_HIGH_ISR_TABLE_OFFSET + 28)
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#define INTERRUPT_ID_ATM_DMA_6 (INTERNAL_HIGH_ISR_TABLE_OFFSET + 29)
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#define INTERRUPT_ID_ATM_DMA_7 (INTERNAL_HIGH_ISR_TABLE_OFFSET + 30)
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#define INTERRUPT_ID_ENETSW_TX_DMA_0 (INTERNAL_EXT_ISR_TABLE_OFFSET + 0)
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#define INTERRUPT_ID_ENETSW_TX_DMA_1 (INTERNAL_EXT_ISR_TABLE_OFFSET + 1)
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#define INTERRUPT_ID_ENETSW_TX_DMA_2 (INTERNAL_EXT_ISR_TABLE_OFFSET + 2)
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#define INTERRUPT_ID_ENETSW_TX_DMA_3 (INTERNAL_EXT_ISR_TABLE_OFFSET + 3)
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#define INTERRUPT_ID_ATM_DMA_8 (INTERNAL_EXT_ISR_TABLE_OFFSET + 4)
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#define INTERRUPT_ID_ATM_DMA_9 (INTERNAL_EXT_ISR_TABLE_OFFSET + 5)
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#define INTERRUPT_ID_ATM_DMA_10 (INTERNAL_EXT_ISR_TABLE_OFFSET + 6)
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#define INTERRUPT_ID_ATM_DMA_11 (INTERNAL_EXT_ISR_TABLE_OFFSET + 7)
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#define INTERRUPT_ID_ATM_DMA_12 (INTERNAL_EXT_ISR_TABLE_OFFSET + 8)
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#define INTERRUPT_ID_ATM_DMA_13 (INTERNAL_EXT_ISR_TABLE_OFFSET + 9)
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#define INTERRUPT_ID_ATM_DMA_14 (INTERNAL_EXT_ISR_TABLE_OFFSET + 10)
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#define INTERRUPT_ID_ATM_DMA_15 (INTERNAL_EXT_ISR_TABLE_OFFSET + 11)
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#define INTERRUPT_ID_ATM_DMA_16 (INTERNAL_EXT_ISR_TABLE_OFFSET + 12)
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#define INTERRUPT_ID_ATM_DMA_17 (INTERNAL_EXT_ISR_TABLE_OFFSET + 13)
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#define INTERRUPT_ID_ATM_DMA_18 (INTERNAL_EXT_ISR_TABLE_OFFSET + 14)
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#define INTERRUPT_ID_ATM_DMA_19 (INTERNAL_EXT_ISR_TABLE_OFFSET + 15)
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#define INTERRUPT_ID_LS_SPIM (INTERNAL_EXT_ISR_TABLE_OFFSET + 16)
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#define INTERRUPT_ID_GMAC_DMA_0 (INTERNAL_EXT_ISR_TABLE_OFFSET + 17)
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#define INTERRUPT_ID_GMAC_DMA_1 (INTERNAL_EXT_ISR_TABLE_OFFSET + 18)
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#define INTERRUPT_ID_GMAC (INTERNAL_EXT_ISR_TABLE_OFFSET + 19)
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#endif
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/* Last Physical Interrupt ID */
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#define INTERRUPT_ID_LAST_PHYS INTERRUPT_ID_USBD_5
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/* Virtual interrupts */
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#define VIRTUAL_INTR_TABLE_OFFSET (INTERRUPT_ID_LAST_PHYS + 1)
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/* PCIE MSI virtual interrupts */
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#define PCIE_MSI_IDS_PER_DOMAIN 8
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#define INTERRUPT_ID_PCIE_MSI_FIRST (VIRTUAL_INTR_TABLE_OFFSET + 0)
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#define INTERRUPT_ID_PCIE0_MSI_FIRST INTERRUPT_ID_PCIE_MSI_FIRST
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#define INTERRUPT_ID_PCIE0_MSI_LAST (INTERRUPT_ID_PCIE0_MSI_FIRST + PCIE_MSI_IDS_PER_DOMAIN - 1)
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#define INTERRUPT_ID_PCIE1_MSI_FIRST (INTERRUPT_ID_PCIE0_MSI_LAST + 1)
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#define INTERRUPT_ID_PCIE1_MSI_LAST (INTERRUPT_ID_PCIE1_MSI_FIRST + PCIE_MSI_IDS_PER_DOMAIN - 1)
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#define INTERRUPT_ID_PCIE_MSI_LAST INTERRUPT_ID_PCIE1_MSI_LAST
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/* Last Virtual Interrupt ID */
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#define INTERRUPT_ID_LAST_VIRT INTERRUPT_ID_PCIE_MSI_LAST
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#define INTERRUPT_ID_LAST INTERRUPT_ID_LAST_VIRT
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#define NUM_EXT_INT (INTERRUPT_ID_EXTERNAL_5-INTERRUPT_ID_EXTERNAL_0+1)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __63148_INTR_H */
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