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158 lines
5.5 KiB
C
158 lines
5.5 KiB
C
#ifndef __PKTDMA_DEFINES_H_INCLUDED__
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#define __PKTDMA_DEFINES_H_INCLUDED__
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#define XTMFREE_FORCE_FREE 1
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#define XTMFREE_NO_FORCE_FREE 0
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#define ENET_TX_EGRESS_QUEUES_MAX 4
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#if defined(CONFIG_BCM963268) || defined(CONFIG_BCM_FAP_MODULE)
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/* Increase these from 1 to 2 to support rx & tx splitting - Oct 2010 */
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#define ENET_RX_CHANNELS_MAX 2
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#define ENET_TX_CHANNELS_MAX 2
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#elif defined(CONFIG_BCM963268) && defined(CONFIG_BCM_FAP_PWRSAVE)
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#define ENET_RX_CHANNELS_MAX 3 // 1 iuDMA needed for Host when FAP is powered off
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#define ENET_TX_CHANNELS_MAX 3 // 1 iuDMA needed for Host when FAP is powered off
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#elif defined(CONFIG_BCM947189)
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#define ENET_RX_CHANNELS_MAX 2
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#define ENET_TX_CHANNELS_MAX 2
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#else
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#define ENET_RX_CHANNELS_MAX 4
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#define ENET_TX_CHANNELS_MAX 4
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#endif
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#define XTM_RX_CHANNELS_MAX 2
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#define XTM_TX_CHANNELS_MAX 16
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/*
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* -----------------------------------------------------------------------------
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* 1. Added % memory used by BPM to menuconfig. Set default to 15% of memory.
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* 2. For 64MB #of RXBDs and #of buffers doubles to that of 32MB
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* 3. Mini-jumbo packets (size of 2K) support on 6816 only.
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* 4. Number of RXBDs will be computed as % of total buffers. i.e. Ethernet
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* host BDs on 40% of total buffers. Unless CMF is compiled in and then
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* it is reduced to 20% of total
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* 5. FAP has fixed number of BDs because of limited DSPRAM/PSRAM
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* Eth Chnl: # of RXBDs = 600
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* XTM Chnl: # of RXBDs = 200
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* Eth (WoE) Chnl: # of RXBDs = 800 (min)
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*
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* -----------------------------------------------------------------------------
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*/
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#if (defined(CONFIG_BCM_INGQOS) || defined(CONFIG_BCM_INGQOS_MODULE) || defined(CONFIG_BCM_BPM) || defined(CONFIG_BCM_BPM_MODULE))
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/* Channel-0 is default */
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/* % of number of buffers assigned to RXBDs */
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#define ENET_DEF_RXBDS_BUF_PRCNT 40
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#define XTM_DEF_RXBDS_BUF_PRCNT 10
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/* Fixed # of RXBDs for non-default channels */
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#define HOST_ENET_NON_DEF_CHNL_NR_RXBDS 100
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#define HOST_XTM_NON_DEF_CHNL_NR_RXBDS 16
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#define HOST_ENET_NR_RXBDS 600
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#if defined(CHIP_6338)
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/* 38 needs a bigger cell queue for soft sar (64 bytes each) */
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#define HOST_XTM_NR_RXBDS 500
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#else
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#define HOST_XTM_NR_RXBDS HOST_ENET_NR_RXBDS
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#endif
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/* Host/MIPS: # of TXBDs for IuDMA managed by host */
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#if defined(CONFIG_BCM947189)
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#define HOST_ENET_NR_TXBDS 800
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#else
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#define HOST_ENET_NR_TXBDS 200
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#endif
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#if defined(CONFIG_BCM_DSL_GINP_RTX) || defined(SUPPORT_DSL_GINP_RTX)
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/* 20 ms RTX buffering */
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#define HOST_XTM_NR_TXBDS 4700
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#else
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#define HOST_XTM_NR_TXBDS 400
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#endif
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#define MOCA_TXQ_DEPTH_MAX 3000
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#if defined(CONFIG_BCM963268)
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/* FAP: # of buffers assigned to RXBDs */
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#define FAP_ENET_NR_RXBDS 600 /* FAP chnl */
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#define FAP_XTM_NR_RXBDS 200
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#define HOST_ENET_NR_RXBDS_MIN 800 /* Host chnl, WANoE case */
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#define HOST_XTM_NR_RXBDS_MIN 512
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/* FAP: # of RXBDs for non-default channels */
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#define FAP_ENET_NON_DEF_CHNL_NR_RXBDS HOST_ENET_NON_DEF_CHNL_NR_RXBDS
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#define FAP_XTM_NON_DEF_CHNL_NR_RXBDS HOST_XTM_NON_DEF_CHNL_NR_RXBDS
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/* FAP: # of TXBDs for IuDMA managed by FAP */
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#define FAP_ENET_NR_TXBDS HOST_ENET_NR_TXBDS
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#define FAP_XTM_NR_TXBDS HOST_XTM_NR_TXBDS
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#endif
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#else // (defined(CONFIG_BCM_INGQOS) || defined(CONFIG_BCM_INGQOS_MODULE) || defined(CONFIG_BCM_BPM) || defined(CONFIG_BCM_BPM_MODULE))
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/* Channel-0 is default */
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/* Fixed # of RXBDs for non-default channels */
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#define HOST_ENET_NON_DEF_CHNL_NR_RXBDS 100
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#define HOST_XTM_NON_DEF_CHNL_NR_RXBDS 16
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#define HOST_ENET_NR_RXBDS 400
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#if defined(CHIP_6338)
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/* 38 needs a bigger cell queue for soft sar (64 bytes each) */
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#define HOST_XTM_NR_RXBDS 500
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#else
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#define HOST_XTM_NR_RXBDS HOST_ENET_NR_RXBDS
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#endif
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/* Host/MIPS: # of TXBDs for IuDMA managed by host */
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#define HOST_ENET_NR_TXBDS 200
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#define HOST_XTM_NR_TXBDS HOST_ENET_NR_RXBDS
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#define MOCA_TXQ_DEPTH_MAX 3000
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#if defined(CONFIG_BCM963268)
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/* FAP: # of buffers assigned to RXBDs */
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#define FAP_ENET_NR_RXBDS HOST_ENET_NR_RXBDS
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#define FAP_XTM_NR_RXBDS HOST_XTM_NR_RXBDS
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/* FAP: # of RXBDs for non-default channels */
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#define FAP_ENET_NON_DEF_CHNL_NR_RXBDS HOST_ENET_NON_DEF_CHNL_NR_RXBDS
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#define FAP_XTM_NON_DEF_CHNL_NR_RXBDS HOST_XTM_NON_DEF_CHNL_NR_RXBDS
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/* FAP: # of TXBDs for IuDMA managed by FAP */
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#define FAP_ENET_NR_TXBDS HOST_ENET_NR_TXBDS
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#define FAP_XTM_NR_TXBDS HOST_XTM_NR_TXBDS
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#endif
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#endif // (defined(CONFIG_BCM_INGQOS) || defined(CONFIG_BCM_INGQOS_MODULE) || defined(CONFIG_BCM_BPM) || defined(CONFIG_BCM_BPM_MODULE))
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#if (defined(CONFIG_BCM_FAP) || defined(CONFIG_BCM_FAP_MODULE))
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/* Note: these #defines are also the default values for various allocations
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when not using BPM hence they are not protected by CONFIG_BCM_BPM */
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#define FAP_BPM_ENET_BULK_ALLOC_MAX 128
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#define FAP_BPM_XTM_BULK_ALLOC_MAX 128
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#define FAP_BPM_BUF_CACHE_SIZE 1024
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#define FAP_BPM_BUF_CACHE_ALLOC_THRESH 512
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#define FAP_BPM_BUF_CACHE_BULK_ALLOC_MAX 512
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#define FAP_BPM_FBL_ENT_SIZE 512
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#if defined(CONFIG_BCM_DSL_GINP_RTX) || defined(SUPPORT_DSL_GINP_RTX)
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#define FAP_BPM_FBL_MAX_REQ 64
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#else
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#define FAP_BPM_FBL_MAX_REQ 16
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#endif
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/* other chips have 2 FAPs */
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#define FAP_BPM_BUF_RESV ((FAP_BPM_BUF_CACHE_SIZE+FAP_BPM_FBL_ENT_SIZE)*2)
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#else
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#define FAP_BPM_BUF_RESV 0
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#endif
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#endif /* __PKTDMA_DEFINES_H_INCLUDED__ */
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