mirror of
https://github.com/gnuton/asuswrt-merlin.ng.git
synced 2025-05-19 07:51:46 +02:00
212 lines
4.9 KiB
C
212 lines
4.9 KiB
C
/*
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* * <:copyright-BRCM:2017:DUAL/GPL:standard
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* *
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* * Copyright (c) 2017 Broadcom
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* * All Rights Reserved
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* *
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* * This program is free software; you can redistribute it and/or modify
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* * it under the terms of the GNU General Public License, version 2, as published by
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* * the Free Software Foundation (the "GPL").
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* *
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* * This program is distributed in the hope that it will be useful,
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* * but WITHOUT ANY WARRANTY; without even the implied warranty of
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* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* * GNU General Public License for more details.
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* *
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* *
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* * A copy of the GPL is available at http://www.broadcom.com/licenses/GPLv2.php, or by
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* * writing to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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* * Boston, MA 02111-1307, USA.
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* *
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* * :>
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* */
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#ifndef _BMOCA_H_
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#define _BMOCA_H_
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#include <linux/if.h>
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#include <linux/types.h>
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#include <linux/ioctl.h>
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/* NOTE: These need to match what is defined in the API template */
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#define MOCA_IE_DRV_PRINTF 0xff00
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#define MOCA_IE_WDT 0xff01
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#define MOCA_BAND_HIGHRF 0
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#define MOCA_BAND_MIDRF 1
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#define MOCA_BAND_WANRF 2
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#define MOCA_BAND_EXT_D 3
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#define MOCA_BAND_D_LOW 4
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#define MOCA_BAND_D_HIGH 5
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#define MOCA_BAND_E 6
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#define MOCA_BAND_F 7
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#define MOCA_BAND_G 8
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#define MOCA_BAND_H 9
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#define MOCA_BAND_MAX 10
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#define MOCA_BAND_NAMES { \
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"highrf", "midrf", "wanrf", \
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"ext_d", "d_low", "d_high", \
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"e", "f", "g", "h"\
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}
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#define MOCA_BOOT_FLAGS_BONDED (1 << 0)
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#define MOCA_IOC_MAGIC 'M'
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#define MOCA_IOCTL_GET_DRV_INFO_V2 _IOR(MOCA_IOC_MAGIC, 0, \
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struct moca_kdrv_info_v2)
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#define MOCA_IOCTL_START _IOW(MOCA_IOC_MAGIC, 1, struct moca_start)
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#define MOCA_IOCTL_STOP _IO(MOCA_IOC_MAGIC, 2)
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#define MOCA_IOCTL_READMEM _IOR(MOCA_IOC_MAGIC, 3, struct moca_xfer)
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#define MOCA_IOCTL_WRITEMEM _IOR(MOCA_IOC_MAGIC, 4, struct moca_xfer)
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#define MOCA_IOCTL_CHECK_FOR_DATA _IOR(MOCA_IOC_MAGIC, 5, int)
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#define MOCA_IOCTL_WOL _IOW(MOCA_IOC_MAGIC, 6, int)
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#define MOCA_IOCTL_GET_DRV_INFO _IOR(MOCA_IOC_MAGIC, 0, struct moca_kdrv_info)
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#define MOCA_IOCTL_SET_CPU_RATE _IOR(MOCA_IOC_MAGIC, 7, unsigned int)
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#define MOCA_IOCTL_SET_PHY_RATE _IOR(MOCA_IOC_MAGIC, 8, unsigned int)
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#define MOCA_IOCTL_GET_3450_REG _IOR(MOCA_IOC_MAGIC, 9, unsigned int) /* Reserved */
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#define MOCA_IOCTL_SET_3450_REG _IOR(MOCA_IOC_MAGIC, 10, unsigned int) /* Reserved */
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#define MOCA_IOCTL_PM_SUSPEND _IO(MOCA_IOC_MAGIC, 11)
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#define MOCA_IOCTL_PM_WOL _IO(MOCA_IOC_MAGIC, 12)
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#define MOCA_IOCTL_CLK_SSC _IO(MOCA_IOC_MAGIC, 13)
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#define MOCA_DEVICE_ID_UNREGISTERED (-1)
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/* this must match MoCAOS_IFNAMSIZE */
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#define MOCA_IFNAMSIZ 16
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/* ID value hinting ioctl caller to use returned IFNAME as is */
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#define MOCA_IFNAME_USE_ID 0xffffffff
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/* Legacy version of moca_kdrv_info */
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struct moca_kdrv_info_v2 {
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__u32 version;
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__u32 build_number;
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__u32 builtin_fw;
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__u32 hw_rev;
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__u32 rf_band;
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__u32 uptime;
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__s32 refcount;
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__u32 gp1;
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__s8 enet_name[MOCA_IFNAMSIZ];
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__u32 enet_id;
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__u32 macaddr_hi;
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__u32 macaddr_lo;
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__u32 phy_freq;
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__u32 device_id;
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};
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/* this must match MoCAOS_DrvInfo */
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struct moca_kdrv_info {
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__u32 version;
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__u32 build_number;
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__u32 builtin_fw;
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__u32 hw_rev;
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__u32 rf_band;
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__u32 uptime;
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__s32 refcount;
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__u32 gp1;
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__s8 enet_name[MOCA_IFNAMSIZ];
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__u32 enet_id;
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__u32 macaddr_hi;
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__u32 macaddr_lo;
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__u32 phy_freq;
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__u32 device_id;
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__u32 chip_id;
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};
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struct moca_xfer {
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__u64 buf;
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__u32 len;
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__u32 moca_addr;
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};
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struct moca_start {
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struct moca_xfer x;
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__u32 boot_flags;
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};
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/* MoCA PM states */
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enum moca_pm_states {
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MOCA_ACTIVE,
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MOCA_SUSPENDING,
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MOCA_SUSPENDING_WAITING_ACK,
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MOCA_SUSPENDING_GOT_ACK,
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MOCA_SUSPENDED,
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MOCA_RESUMING,
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MOCA_NONE
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};
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#ifdef __KERNEL__
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static inline void mac_to_u32(uint32_t *hi, uint32_t *lo, const uint8_t *mac)
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{
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*hi = (mac[0] << 24) | (mac[1] << 16) | (mac[2] << 8) | (mac[3] << 0);
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*lo = (mac[4] << 24) | (mac[5] << 16);
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}
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static inline void u32_to_mac(uint8_t *mac, uint32_t hi, uint32_t lo)
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{
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mac[0] = (hi >> 24) & 0xff;
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mac[1] = (hi >> 16) & 0xff;
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mac[2] = (hi >> 8) & 0xff;
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mac[3] = (hi >> 0) & 0xff;
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mac[4] = (lo >> 24) & 0xff;
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mac[5] = (lo >> 16) & 0xff;
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}
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struct moca_platform_data {
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char enet_name[IFNAMSIZ];
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unsigned int enet_id;
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u32 macaddr_hi;
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u32 macaddr_lo;
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phys_addr_t bcm3450_i2c_base;
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int bcm3450_i2c_addr;
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u32 hw_rev; /* this is the chip_id */
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u32 rf_band;
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int use_dma;
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int use_spi;
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int devId;
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u32 chip_id;
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#ifdef CONFIG_SMP
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int smp_processor_id;
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#endif
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};
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enum {
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HWREV_MOCA_11 = 0x1100,
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HWREV_MOCA_11_LITE = 0x1101,
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HWREV_MOCA_11_PLUS = 0x1102,
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HWREV_MOCA_20_ALT = 0x2000, /* for backward compatibility */
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HWREV_MOCA_20_GEN21 = 0x2001,
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HWREV_MOCA_20_GEN22 = 0x2002,
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HWREV_MOCA_20_GEN23 = 0x2003,
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};
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#define MOCA_PROTVER_11 0x1100
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#define MOCA_PROTVER_20 0x2000
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#define MOCA_PROTVER_MASK 0xff00
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#endif /* __KERNEL__ */
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#endif /* ! _BMOCA_H_ */
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