mirror of
https://github.com/gnuton/asuswrt-merlin.ng.git
synced 2025-05-19 07:51:46 +02:00
91 lines
5.1 KiB
Text
91 lines
5.1 KiB
Text
05:01.0 Class 0604: Device 10b5:9716 (rev aa)
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Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
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Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
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Latency: 0, Cache Line Size: 32 bytes
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Interrupt: pin A routed to IRQ 46
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NUMA node: 0
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Bus: primary=05, secondary=06, subordinate=06, sec-latency=0
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I/O behind bridge: 0000f000-00000fff
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Memory behind bridge: c6c00000-c6ffffff
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Prefetchable memory behind bridge: 0000383ff9c00000-0000383ff9ffffff
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Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
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BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
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PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
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Capabilities: [40] Power Management version 3
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Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
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Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
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Capabilities: [48] MSI: Enable+ Count=1/8 Maskable+ 64bit+
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Address: 00000000fee004d8 Data: 0000
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Masking: 000000fe Pending: 00000000
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Capabilities: [68] Express (v2) Downstream Port (Slot+), MSI 00
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DevCap: MaxPayload 1024 bytes, PhantFunc 0
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ExtTag- RBE+
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DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
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RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
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MaxPayload 128 bytes, MaxReadReq 128 bytes
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DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
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LnkCap: Port #1, Speed 8GT/s, Width x4, ASPM L1, Exit Latency L0s <4us, L1 <4us
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ClockPM- Surprise+ LLActRep+ BwNot+ ASPMOptComp+
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LnkCtl: ASPM Disabled; Disabled- CommClk-
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ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
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LnkSta: Speed 8GT/s, Width x4, TrErr- Train- SlotClk- DLActive+ BWMgmt+ ABWMgmt-
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SltCap: AttnBtn- PwrCtrl+ MRL- AttnInd+ PwrInd+ HotPlug+ Surprise+
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Slot #1, PowerLimit 25.000W; Interlock- NoCompl-
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SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg+
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Control: AttnInd Off, PwrInd On, Power- Interlock-
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SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
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Changed: MRL- PresDet- LinkState-
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DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR+, OBFF Via message ARIFwd+
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DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd+
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LnkCtl2: Target Link Speed: 8GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
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Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
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Compliance De-emphasis: -6dB
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LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete+, EqualizationPhase1+
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EqualizationPhase2+, EqualizationPhase3+, LinkEqualizationRequest-
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Capabilities: [a4] Subsystem: Device 10b5:9716
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Capabilities: [100 v1] Device Serial Number 00-0e-df-10-b5-97-00-aa
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Capabilities: [fb4 v1] Advanced Error Reporting
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UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
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UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
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UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
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CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
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CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
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AERCap: First Error Pointer: 1f, GenCap+ CGenEn- ChkCap+ ChkEn-
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Capabilities: [138 v1] Power Budgeting <?>
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Capabilities: [10c v1] #19
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Capabilities: [148 v1] Virtual Channel
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Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
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Arb: Fixed- WRR32- WRR64- WRR128-
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Ctrl: ArbSelect=Fixed
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Status: InProgress-
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VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
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Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
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Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=01
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Status: NegoPending- InProgress-
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Capabilities: [f24 v1] Access Control Services
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ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl+ DirectTrans+
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ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
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Capabilities: [b70 v1] Vendor Specific Information: ID=0001 Rev=0 Len=010 <?>
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Capabilities: [b60 v1] Downstream Port Containment
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DpcCap: INT Msg #0, RPExt- PoisonedTLP+ SwTrigger+ RP PIO Log 0, DL_ActiveErr+
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DpcCtl: Trigger:2 Cmpl+ INT+ ErrCor- PoisonedTLP- SwTrigger- DL_ActiveErr-
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DpcSta: Trigger- Reason:00 INT- RPBusy- TriggerExt:00 RP PIO ErrPtr:00
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Source: 0000
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Kernel driver in use: pcieport
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00: b5 10 16 97 07 05 10 00 aa 00 04 06 08 00 01 00
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10: 00 00 00 00 00 00 00 00 05 06 06 00 f1 01 00 00
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20: c0 c6 f0 c6 c1 f9 f1 f9 3f 38 00 00 3f 38 00 00
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30: 00 00 00 00 40 00 00 00 00 00 00 00 0a 01 12 00
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40: 01 48 03 c8 08 00 00 00 05 68 87 01 d8 04 e0 fe
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50: 00 00 00 00 00 00 00 00 fe 00 00 00 00 00 00 00
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60: 00 00 00 00 00 00 00 00 10 a4 62 01 03 80 00 00
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70: 00 08 09 00 43 68 79 01 00 00 43 60 fa 0c 08 00
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80: f8 11 40 00 00 00 00 00 00 00 00 00 60 08 04 00
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90: 20 00 00 00 0e 0f 00 00 03 00 1e 00 00 00 00 00
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a0: 00 00 00 00 0d 00 00 00 b5 10 16 97 00 00 00 00
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b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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