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https://github.com/gnuton/asuswrt-merlin.ng.git
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124 lines
6.1 KiB
C
124 lines
6.1 KiB
C
/*
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<:copyright-BRCM:2012:DUAL/GPL:standard
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Copyright (c) 2012 Broadcom
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All Rights Reserved
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Unless you and Broadcom execute a separate written software license
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agreement governing use of this software, this software is licensed
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to you under the terms of the GNU General Public License version 2
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(the "GPL"), available at http://www.broadcom.com/licenses/GPLv2.php,
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with the following added to such license:
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As a special exception, the copyright holders of this software give
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you permission to link this software with independent modules, and
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to copy and distribute the resulting executable under terms of your
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choice, provided that you also meet, for each linked independent
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module, the terms and conditions of the license of that module.
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An independent module is a module which is not derived from this
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software. The special exception does not apply to any modifications
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of the software.
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Not withstanding the above, under no circumstances may you combine
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this software in any way with any other Broadcom software provided
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under a license other than the GPL, without Broadcom's express prior
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written consent.
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:>
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*/
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#ifndef __6838_INTR_H
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#define __6838_INTR_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define INTERRUPT_ID_SOFTWARE_0 0
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#define INTERRUPT_ID_SOFTWARE_1 1
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/*=====================================================================*/
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/* BCM6828 Timer Interrupt Level Assignments */
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/*=====================================================================*/
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#define MIPS_TIMER_INT 7
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/*=====================================================================*/
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/* Peripheral ISR Table Offset */
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/*=====================================================================*/
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#define INTERNAL_ISR_TABLE_OFFSET 8
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#define INTERNAL_EXT_ISR_TABLE_OFFSET (INTERNAL_ISR_TABLE_OFFSET + 64)
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#define EXTERNAL_ISR_TABLE_OFFSET (INTERNAL_EXT_ISR_TABLE_OFFSET + 64)
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/*=====================================================================*/
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/* Logical Peripheral Interrupt IDs */
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/*=====================================================================*/
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#define INTERRUPT_ID_TIMER (INTERNAL_ISR_TABLE_OFFSET + 0)
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#define INTERRUPT_ID_UART (INTERNAL_ISR_TABLE_OFFSET + 1)
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#define INTERRUPT_ID_UART1 (INTERNAL_ISR_TABLE_OFFSET + 2)
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#define INTERRUPT_ID_NAND_FLASH (INTERNAL_ISR_TABLE_OFFSET + 3)
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#define INTERRUPT_ID_I2C (INTERNAL_ISR_TABLE_OFFSET + 4)
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#define INTERRUPT_ID_HS_SPIM (INTERNAL_ISR_TABLE_OFFSET + 5)
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#define INTERRUPT_ID_PER_ERROR (INTERNAL_ISR_TABLE_OFFSET + 6)
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#define INTERRUPT_ID_UBUS_ERROR (INTERNAL_ISR_TABLE_OFFSET + 7)
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#define INTERRUPT_ID_UART2 (INTERNAL_ISR_TABLE_OFFSET + 8)
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#define INTERRUPT_ID_KEYDONE (INTERNAL_ISR_TABLE_OFFSET + 9)
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#define INTERRUPT_ID_RNG_READY (INTERNAL_ISR_TABLE_OFFSET + 10)
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#define INTERRUPT_ID_USIM_ESD (INTERNAL_ISR_TABLE_OFFSET + 11)
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#define INTERRUPT_ID_USIM (INTERNAL_ISR_TABLE_OFFSET + 12)
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#define INTERRUPT_ID_USIM_PRES (INTERNAL_ISR_TABLE_OFFSET + 13)
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#define INTERRUPT_ID_DG (INTERNAL_ISR_TABLE_OFFSET + 14)
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#define INTERRUPT_ID_EXTERNAL (INTERNAL_ISR_TABLE_OFFSET + 15)
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#define INTERRUPT_ID_RDP_RUNNER (INTERNAL_ISR_TABLE_OFFSET + 16) /* 10 interrupts */
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#define INTERRUPT_ID_RDP_UBUS_ERR (INTERNAL_ISR_TABLE_OFFSET + 26)
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#define INTERRUPT_ID_RDP_UBUS_PORT_ERR (INTERNAL_ISR_TABLE_OFFSET + 27)
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#define INTERRUPT_ID_WAN_8KHZ (INTERNAL_ISR_TABLE_OFFSET + 28)
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#define INTERRUPT_ID_WAN_EPON (INTERNAL_ISR_TABLE_OFFSET + 29)
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#define INTERRUPT_ID_WAN_GPON_RX (INTERNAL_ISR_TABLE_OFFSET + 30)
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#define INTERRUPT_ID_WAN_GPON_TX (INTERNAL_ISR_TABLE_OFFSET + 31)
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#define INTERRUPT_ID_RDP_MS1588 (INTERNAL_EXT_ISR_TABLE_OFFSET + 0)
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#define INTERRUPT_ID_RDP_SBPM (INTERNAL_EXT_ISR_TABLE_OFFSET + 1)
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#define INTERRUPT_ID_RDP_BPM (INTERNAL_EXT_ISR_TABLE_OFFSET + 2)
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#define INTERRUPT_ID_RDP_QEGPHY (INTERNAL_EXT_ISR_TABLE_OFFSET + 3) /* 4 irqs */
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#define INTERRUPT_ID_WAN_NCO_GPON (INTERNAL_EXT_ISR_TABLE_OFFSET + 7)
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#define INTERRUPT_ID_USBH_OHCI (INTERNAL_EXT_ISR_TABLE_OFFSET + 8)
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#define INTERRUPT_ID_USBH_EHCI (INTERNAL_EXT_ISR_TABLE_OFFSET + 9)
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#define INTERRUPT_ID_USBH INTERRUPT_ID_USBH_OHCI /*for compatibility*/
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#define INTERRUPT_ID_USBH20 INTERRUPT_ID_USBH_EHCI /*for compatibility*/
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#define INTERRUPT_ID_USBH_DISCON (INTERNAL_EXT_ISR_TABLE_OFFSET + 10)
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#define INTERRUPT_ID_USBH_CCS (INTERNAL_EXT_ISR_TABLE_OFFSET + 11)
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#define INTERRUPT_ID_PCIE_RC (INTERNAL_EXT_ISR_TABLE_OFFSET + 12)
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#define INTERRUPT_ID_PCIE1_RC (INTERNAL_EXT_ISR_TABLE_OFFSET + 13)
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#define INTERRUPT_ID_APM (INTERNAL_EXT_ISR_TABLE_OFFSET + 14)
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#define INTERRUPT_ID_APM_IUDMA (INTERNAL_EXT_ISR_TABLE_OFFSET + 15)
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#define INTERRUPT_ID_MDIO_EXT (INTERNAL_EXT_ISR_TABLE_OFFSET + 17)
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#define INTERRUPT_ID_MDIO_EGPHY (INTERNAL_EXT_ISR_TABLE_OFFSET + 18)
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#define INTERRUPT_ID_MDIO_SATA (INTERNAL_EXT_ISR_TABLE_OFFSET + 19)
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#define INTERRUPT_ID_MDIO_AEPCS (INTERNAL_EXT_ISR_TABLE_OFFSET + 20)
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#define INTERRUPT_ID_USBD_SYS (INTERNAL_EXT_ISR_TABLE_OFFSET + 21)
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#define INTERRUPT_ID_PER_ERR_PORT (INTERNAL_EXT_ISR_TABLE_OFFSET + 28)
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#define INTERRUPT_ID_EXTERNAL_0 (EXTERNAL_ISR_TABLE_OFFSET + 0)
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#define INTERRUPT_ID_EXTERNAL_1 (EXTERNAL_ISR_TABLE_OFFSET + 1)
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#define INTERRUPT_ID_EXTERNAL_2 (EXTERNAL_ISR_TABLE_OFFSET + 2)
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#define INTERRUPT_ID_EXTERNAL_3 (EXTERNAL_ISR_TABLE_OFFSET + 3)
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#define INTERRUPT_ID_EXTERNAL_4 (EXTERNAL_ISR_TABLE_OFFSET + 4)
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#define INTERRUPT_ID_EXTERNAL_5 (EXTERNAL_ISR_TABLE_OFFSET + 5)
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#define EXTERNAL_INTERRUPT_NUM 6
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#define INTERRUPT_ID_LAST INTERRUPT_ID_EXTERNAL_5
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#define NUM_EXT_INT (INTERRUPT_ID_EXTERNAL_5-INTERRUPT_ID_EXTERNAL_0+1)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __BCM6838_H */
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